Altera Stratix IV GT 100G开发方案
关键词：
altera , stratix iv gt 100g
altera公司的stratix iv 40nm fpga包括stratix iv e, stratix iv gx和stratix iv gt三个系列, 具有最高的密度(680k 逻辑单元(le),22.4 mbits 嵌入式存储器和1,360个18 x 18 乘法器),最佳的性能以及最低的功耗, 系统带宽(8.5 gbps的48 个高速收发器，以及 1,067 mbps (533 mhz) ddr3存储器接口)达到了前所未有的水平，并具有优异的信号完整性, 非常适合无线通信,固网,军事,广播等其他最终市场中的高端数字应用。本文介绍了stratix® iv fpga主要特性, stratix iv gt器件框图,以及采用ep4s100g5f45i1 stratix iv gt fpga器件的stratix iv gt 100g开发板主要特性,方框图,详细电路图和材料清单.
altera® stratix® iv fpgas deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. stratix iv fpgas are based on the taiwan semiconductor manufacturing company (tsmc) 40-nm process technology and surpass all other high-end fpgas, with the highest logic density, most transceivers, and lowest power requirements.
the stratix iv device family contains three optimized variants to meet different application requirements:
■ stratix iv e (enhanced) fpgas—up to 813,050 logic elements (les), 33,294 kilobits
(kb) ram, and 1,288 18 x 18 bit multipliers
■ stratix iv gx transceiver fpgas—up to 531,200 les, 27,376 kb ram, 1,288 18 x 18-bit multipliers, and 48 full-duplex clock data recovery (cdr)-based transceivers at up to 8.5 gbps
■ stratix iv gt—up to 531,200 les, 27,376 kb ram, 1,288 18 x 18-bit multipliers, and 48 full-duplex cdr-based transceivers at up to 11.3 gbps
stratix® iv fpga主要特性:
the following list summarizes the stratix iv device family features:
■ up to 48 full-duplex cdr-based transceivers in stratix iv gx and gt devices supporting data rates up to 8.5 gbps and 11.3 gbps, respectively
■ dedicated circuitry to support physical layer functionality for popular serial protocols, such as pci express (pcie) (pipe) gen1 and gen2, gbps ethernet (gbe), serial rapidio, sonet/sdh, xaui/higig, (oif) cei-6g, sd/hd/3g-sdi, fibre channel, sfi-5, and interlaken
■ complete pcie protocol solution with embedded pcie hard ip blocks that implement phy-mac layer, data link layer, and transaction layer functionality
■ programmable transmitter pre-emphasis and receiver equalization circuitry to compensate for frequency-dependent losses in the physical medium
■ typical physical medium attachment (pma) power consumption of 100 mw at 3.125 gbps and 135 mw at 6.375 gbps per channel
■ 72,600 to 813,050 equivalent les per device
■ 7,370 to 33,294 kb of enhanced trimatrix memory consisting of three ram block sizes to implement true dual-port memory and fifo buffers
■ high-speed digital signal processing (dsp) blocks configurable as 9 x 9-bit, 12 x 12-bit, 18 x 18-bit, and 36 x 36-bit full-precision multipliers at up to 600 mhz
■ up to 16 global clocks (gclk), 88 regional clocks (rclk), and 132 periphery clocks (pclk) per device
■ programmable power technology that minimizes power while maximizing device performance
■ up to 1,120 user i/o pins arranged in 24 modular i/o banks that support a wide range of single-ended and differential i/o standards
■ support for high-speed external memory interfaces including ddr, ddr2, ddr3 sdram, rldram ii, qdr ii, and qdr ii+ sram on up to 24 modular i/o banks
■ high-speed lvds i/o support with serializer/deserializer (serdes), dynamic phase alignment (dpa), and soft-cdr circuitry at data rates up to 1.6 gbps
■ support for source-synchronous bus standards, including sgmii, gbe, spi-4 phase 2 (pos-phy level 4), sfi-4.1, xsbi, utopia iv, npsi, and csix-l1
■ pinouts for stratix iv e devices designed to allow migration of designs from stratix iii to stratix iv e with minimal pcb impact
stratix iv gt devices
stratix iv gt devices provide up to 48 cdr-based transceiver channels per device:
■ thirty-two out of the 48 transceiver channels have dedicated pcs and pma circuitry and support data rates between 600 mbps and 11.3 gbps
■ the remaining 16 transceiver channels have dedicated pma-only circuitry and support data rates between 600 mbps and 6.5 gbps
2012-2-28 08:44:51 上传
下载附件 (42.58 kb)
图1. stratix iv gt器件框图
stratix iv gt器件主要特性:
2012-2-28 08:44:51 上传
下载附件 (19.34 kb)
2012-2-28 08:44:51 上传
下载附件 (31.13 kb)
采用ep4s100g5f45i1 stratix iv gt fpga器件的stratix iv gt 100g开发板
stratix iv gt 器件ep4s100g5f45i1主要特性:
2012-2-28 08:44:51 上传
下载附件 (14.78 kb)
the stratix iv gt 100g development board provides a hardware platform for evaluating the performance and signal integrity features of the altera® stratix iv gt devices.
altera的stratix® iv gt版100g开发套件支持您对100gbe设计进行全面评估：
通过光模块，支持10g/40g和100g线路接口。
通过4x18 adrii和4x32 ddr3存储器块，支持需要外部存储器接口的应用。
通过两对fci airmax连接器，使用系统侧接口。
全面的线路侧(光模块)至系统侧(airmax连接器)数据通路分析。
评估性能高达11.3 gbps的收发器。
验证兼容10g/40g/100g以太网、interlaken、cei-6g/11g、pci express (gen1, gen2和gen3)、serial rapidio®以及其他主要标准的物理介质附加(pma)子层。
验证sfp、sfp+、qsfp和cfp等光模块之间的互操作性。
stratix iv gt版100g开发套件包括：
stratix iv gt开发板(参见图1)
安装的器件：ep4s100g5f45i1n
epm2210f324c3n，max® ii 256引脚cpld
配置状态和设置单元
快速被动并行(fpp)配置
嵌入式usb-blastertm下载电缆
时钟
板上可编程时钟振荡器
sma连接器，为收发器参考时钟提供外部差分时钟。
通用用户输入/输出
dip和按键式开关
led
lcd
存储器件
1-gb同步闪存(主要用于存储两个fpga配置——工厂和用户配置)
板上存储器
4个2-gb ddr3 sdram
4个72-mb qdr ii sram
元件和接口
10/100/1000以太网phy和rj-45插头
36个收发器通道
1个sfp+接口通道
1个具有edc的sfp+接口通道
4个qsfp接口通道
10个cfp接口通道
20个interlaken接口通道
温度测量电路
管芯温度
环境温度
电源
14-v至20-v直流输入
2.5-mm筒形插座，用于直流电源输入。
on/off电源滑动开关
板上电源测量电路
quartus ii软件许可并没有含在这一套件中
you can use this development kit to:
• develop and test designs to interface with a variety of different optical modules.
• develop and test interlaken designs.
• develop and test memory subsystems consisting of ddr3 or qdr ii memory.
• build designs capable of migrating to altera’s hardcopy iv asics.
2012-2-28 08:44:51 上传
下载附件 (37.49 kb)
图2.stratix iv gt 100g开发板方框图
2012-2-28 08:44:51 上传
下载附件 (114.28 kb)
图3.stratix iv gt 100g开发板外形图
stratix iv gt 100g开发板电路图见:
2012-2-28 08:44:51 上传
下载附件 (914 bytes)
stratix iv gt 100g开发板电路图.pdf(1.74 mb, 下载次数: 0)2012-2-28 08:44:17 上传
下载次数: 0
下载积分: 积分 -1
stratix iv gt 100g开发板材料清单见:
2012-2-28 08:44:51 上传
下载附件 (138 bytes)
stratix iv gt 100g开发板材料清单.rar(20.85 kb, 下载次数: 0)2012-2-28 08:42:15 上传
下载次数: 0
下载积分: 积分 -1
详情请见:
stx4_siv51001.pdf(525.56 kb, 下载次数: 0)2012-2-28 08:35:43 上传
下载次数: 0
下载积分: 积分 -1
和
rm_sivgt_100g_dev_board.pdf(1.52 mb, 下载次数: 0)2012-2-28 08:35:32 上传
下载次数: 0
下载积分: 积分 -1
电容器容量的表示方法
智能医疗在未来的发展过程中有以下三种值得关注的积极趋势
新能源车续航里程短、充电慢如何解？新能源汽车大会专家有妙招！
元宇宙的股票有哪些_四大元宇宙概念股
Open AI推出神经元可视化库Microscope
Altera Stratix IV GT 100G开发方案
Vivo X60 Pro Plus的预计发布日期已经到来
用FPGA迎接AI时代而不是专用芯片
真无线蓝牙耳机对比评测:国庆出游必不可少的四款机型！
努比亚Z18是怎么做到如此极致的屏占比的
苹果新款平板电脑设计与第一代iPhone类似
新型激光放大器突破10拍瓦极限
嘉兴规模最大的海上风电项目将在平湖动工
5G“大哥”回应，全都要看微波的“脸色”啊！
倍压电路为什么能升压上去？
51单片机操作系统开发中有什么技巧会碰到什么问题
下一代导弹驱动系统的无刷直流电机概要
vivo冲刺销量,iQOO Neo3跌至2549元
特征频率,特征频率是什么意思
毕设早鸟买料优惠！【限时反馈+分享有礼】
altera公司的stratix iv 40nm fpga包括stratix iv e, stratix iv gx和stratix iv gt三个系列, 具有最高的密度(680k 逻辑单元(le),22.4 mbits 嵌入式存储器和1,360个18 x 18 乘法器),最佳的性能以及最低的功耗, 系统带宽(8.5 gbps的48 个高速收发器，以及 1,067 mbps (533 mhz) ddr3存储器接口)达到了前所未有的水平，并具有优异的信号完整性, 非常适合无线通信,固网,军事,广播等其他最终市场中的高端数字应用。本文介绍了stratix® iv fpga主要特性, stratix iv gt器件框图,以及采用ep4s100g5f45i1 stratix iv gt fpga器件的stratix iv gt 100g开发板主要特性,方框图,详细电路图和材料清单.
altera® stratix® iv fpgas deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. stratix iv fpgas are based on the taiwan semiconductor manufacturing company (tsmc) 40-nm process technology and surpass all other high-end fpgas, with the highest logic density, most transceivers, and lowest power requirements.
the stratix iv device family contains three optimized variants to meet different application requirements:
■ stratix iv e (enhanced) fpgas—up to 813,050 logic elements (les), 33,294 kilobits
(kb) ram, and 1,288 18 x 18 bit multipliers
■ stratix iv gx transceiver fpgas—up to 531,200 les, 27,376 kb ram, 1,288 18 x 18-bit multipliers, and 48 full-duplex clock data recovery (cdr)-based transceivers at up to 8.5 gbps
■ stratix iv gt—up to 531,200 les, 27,376 kb ram, 1,288 18 x 18-bit multipliers, and 48 full-duplex cdr-based transceivers at up to 11.3 gbps
stratix® iv fpga主要特性:
the following list summarizes the stratix iv device family features:
■ up to 48 full-duplex cdr-based transceivers in stratix iv gx and gt devices supporting data rates up to 8.5 gbps and 11.3 gbps, respectively
■ dedicated circuitry to support physical layer functionality for popular serial protocols, such as pci express (pcie) (pipe) gen1 and gen2, gbps ethernet (gbe), serial rapidio, sonet/sdh, xaui/higig, (oif) cei-6g, sd/hd/3g-sdi, fibre channel, sfi-5, and interlaken
■ complete pcie protocol solution with embedded pcie hard ip blocks that implement phy-mac layer, data link layer, and transaction layer functionality
■ programmable transmitter pre-emphasis and receiver equalization circuitry to compensate for frequency-dependent losses in the physical medium
■ typical physical medium attachment (pma) power consumption of 100 mw at 3.125 gbps and 135 mw at 6.375 gbps per channel
■ 72,600 to 813,050 equivalent les per device
■ 7,370 to 33,294 kb of enhanced trimatrix memory consisting of three ram block sizes to implement true dual-port memory and fifo buffers
■ high-speed digital signal processing (dsp) blocks configurable as 9 x 9-bit, 12 x 12-bit, 18 x 18-bit, and 36 x 36-bit full-precision multipliers at up to 600 mhz
■ up to 16 global clocks (gclk), 88 regional clocks (rclk), and 132 periphery clocks (pclk) per device
■ programmable power technology that minimizes power while maximizing device performance
■ up to 1,120 user i/o pins arranged in 24 modular i/o banks that support a wide range of single-ended and differential i/o standards
■ support for high-speed external memory interfaces including ddr, ddr2, ddr3 sdram, rldram ii, qdr ii, and qdr ii+ sram on up to 24 modular i/o banks
■ high-speed lvds i/o support with serializer/deserializer (serdes), dynamic phase alignment (dpa), and soft-cdr circuitry at data rates up to 1.6 gbps
■ support for source-synchronous bus standards, including sgmii, gbe, spi-4 phase 2 (pos-phy level 4), sfi-4.1, xsbi, utopia iv, npsi, and csix-l1
■ pinouts for stratix iv e devices designed to allow migration of designs from stratix iii to stratix iv e with minimal pcb impact
stratix iv gt devices
stratix iv gt devices provide up to 48 cdr-based transceiver channels per device:
■ thirty-two out of the 48 transceiver channels have dedicated pcs and pma circuitry and support data rates between 600 mbps and 11.3 gbps
■ the remaining 16 transceiver channels have dedicated pma-only circuitry and support data rates between 600 mbps and 6.5 gbps
2012-2-28 08:44:51 上传
下载附件 (42.58 kb)
图1. stratix iv gt器件框图
stratix iv gt器件主要特性:
2012-2-28 08:44:51 上传
下载附件 (19.34 kb)
2012-2-28 08:44:51 上传
下载附件 (31.13 kb)
采用ep4s100g5f45i1 stratix iv gt fpga器件的stratix iv gt 100g开发板
stratix iv gt 器件ep4s100g5f45i1主要特性:
2012-2-28 08:44:51 上传
下载附件 (14.78 kb)
the stratix iv gt 100g development board provides a hardware platform for evaluating the performance and signal integrity features of the altera® stratix iv gt devices.
altera的stratix® iv gt版100g开发套件支持您对100gbe设计进行全面评估：
通过光模块，支持10g/40g和100g线路接口。
通过4x18 adrii和4x32 ddr3存储器块，支持需要外部存储器接口的应用。
通过两对fci airmax连接器，使用系统侧接口。
全面的线路侧(光模块)至系统侧(airmax连接器)数据通路分析。
评估性能高达11.3 gbps的收发器。
验证兼容10g/40g/100g以太网、interlaken、cei-6g/11g、pci express (gen1, gen2和gen3)、serial rapidio®以及其他主要标准的物理介质附加(pma)子层。
验证sfp、sfp+、qsfp和cfp等光模块之间的互操作性。
stratix iv gt版100g开发套件包括：
stratix iv gt开发板(参见图1)
安装的器件：ep4s100g5f45i1n
epm2210f324c3n，max® ii 256引脚cpld
配置状态和设置单元
快速被动并行(fpp)配置
嵌入式usb-blastertm下载电缆
时钟
板上可编程时钟振荡器
sma连接器，为收发器参考时钟提供外部差分时钟。
通用用户输入/输出
dip和按键式开关
led
lcd
存储器件
1-gb同步闪存(主要用于存储两个fpga配置——工厂和用户配置)
板上存储器
4个2-gb ddr3 sdram
4个72-mb qdr ii sram
元件和接口
10/100/1000以太网phy和rj-45插头
36个收发器通道
1个sfp+接口通道
1个具有edc的sfp+接口通道
4个qsfp接口通道
10个cfp接口通道
20个interlaken接口通道
温度测量电路
管芯温度
环境温度
电源
14-v至20-v直流输入
2.5-mm筒形插座，用于直流电源输入。
on/off电源滑动开关
板上电源测量电路
quartus ii软件许可并没有含在这一套件中
you can use this development kit to:
• develop and test designs to interface with a variety of different optical modules.
• develop and test interlaken designs.
• develop and test memory subsystems consisting of ddr3 or qdr ii memory.
• build designs capable of migrating to altera’s hardcopy iv asics.
2012-2-28 08:44:51 上传
下载附件 (37.49 kb)
图2.stratix iv gt 100g开发板方框图
2012-2-28 08:44:51 上传
下载附件 (114.28 kb)
图3.stratix iv gt 100g开发板外形图
stratix iv gt 100g开发板电路图见:
2012-2-28 08:44:51 上传
下载附件 (914 bytes)
stratix iv gt 100g开发板电路图.pdf(1.74 mb, 下载次数: 0)2012-2-28 08:44:17 上传
下载次数: 0
下载积分: 积分 -1
stratix iv gt 100g开发板材料清单见:
2012-2-28 08:44:51 上传
下载附件 (138 bytes)
stratix iv gt 100g开发板材料清单.rar(20.85 kb, 下载次数: 0)2012-2-28 08:42:15 上传
下载次数: 0
下载积分: 积分 -1
详情请见:
stx4_siv51001.pdf(525.56 kb, 下载次数: 0)2012-2-28 08:35:43 上传
下载次数: 0
下载积分: 积分 -1
和
rm_sivgt_100g_dev_board.pdf(1.52 mb, 下载次数: 0)2012-2-28 08:35:32 上传
下载次数: 0
下载积分: 积分 -1
电容器容量的表示方法
智能医疗在未来的发展过程中有以下三种值得关注的积极趋势
新能源车续航里程短、充电慢如何解？新能源汽车大会专家有妙招！
元宇宙的股票有哪些_四大元宇宙概念股
Open AI推出神经元可视化库Microscope
Altera Stratix IV GT 100G开发方案
Vivo X60 Pro Plus的预计发布日期已经到来
用FPGA迎接AI时代而不是专用芯片
真无线蓝牙耳机对比评测:国庆出游必不可少的四款机型！
努比亚Z18是怎么做到如此极致的屏占比的
苹果新款平板电脑设计与第一代iPhone类似
新型激光放大器突破10拍瓦极限
嘉兴规模最大的海上风电项目将在平湖动工
5G“大哥”回应，全都要看微波的“脸色”啊！
倍压电路为什么能升压上去？
51单片机操作系统开发中有什么技巧会碰到什么问题
下一代导弹驱动系统的无刷直流电机概要
vivo冲刺销量,iQOO Neo3跌至2549元
特征频率,特征频率是什么意思
毕设早鸟买料优惠！【限时反馈+分享有礼】